| PART |
Description |
Maker |
| MC100EP16VA MC100EP17 MC100EP29 MC100EP35 MC100EP4 |
3.3V / 5V ECL Differential Receiver/Driver with High Gain
3.3V / 5V ECL Quad Differential Driver/Receiver
3.3V / 5V ECL Dual Differential Data and Clock D Flip?Flop With Set and Reset
3.3V / 5V ECL JK Flip?Flop
3.3V/5V ECL 8?Bit Serial/Parallel Converter
3.3V / 5V ECL Differential Data and Clock D Flip?Flop
3.3V / 5V ECL 4:1 Differential Multiplexer
3.3V / 5V ECL 2:1 Multiplexer
9?Bit TTL to ECL Translator
3.3V / 5V ECL 8?Bit Synchronous Binary Up Counter
3.3V / 5V ECL 2?Input Differential AND/NAND
3.3V / 5V ECL Quad 4?Input OR/NOR
3.3V / 5V ECL Quad 2?Input Differential AND/NAND
3.3 V / 5 V Hex Differential Line Receiver/Driver
3.3V / 5V ECL 1:2 Differential Fanout Buffer
3.3V / 5V ECL 卤2/4, 卤4/5/6 Clock Generation Chip
3.3V / 5V ECL Differential Receiver/Driver with Internal Termination
3.3V ECL Programmable Delay Chip
3.3V / 5V ECL D Flip?Flop with Set and Reset
3.3V / 5V ECL 卤2 Divider
3.3V / 5V ECL 卤4 Divider
3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter
3.3V / 5V ECL 6?Bit Differential Register with Master Reset
3.3V / 5V ECL D Flip?Flop with Reset and Differential Clock
3.3V / 5V ECL Dual Differential 2:1 Multiplexer
3.3V / 5V ECL Coaxial Cable Driver
?3.3V / ?5V Triple ECL Input to LVPECL/PECL Output Translator
3.3V LVTTL/LVCMOS to Differential LVPECL Translator
|
ONSEMI[ON Semiconductor]
|
| MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
| MC100EL31DG MC100EL31DR2G MC100EL31DTG |
5 V ECL D Flip.Flop With Set and Reset
|
ON Semiconductor
|
| AZ10EL31T AZ100EL31 AZ100EL31D AZ100EL31T AZ10EL31 |
ECL/PECL D Flip-Flop with Set and Reset
|
AZM[Arizona Microtek, Inc]
|
| ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Radiation Hardened Dual D Flip Flop with Set and Reset
D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
| MC100LVEL29-D |
3.3V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
|
ON Semiconductor
|
| 74HC74DR2 74HC74DR2G 74HC74D 74HC74 74HC74DTR2G 74 |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS
Dual D Flip-Flop with Set and Reset(带设置和复位的双D触发 双D触发器的设置和复位（带设置和复位的双触发器）
|
ONSEMI[ON Semiconductor]
|
| 74LVC1G74GD125 |
Single D-type flip-flop with set and reset; positive edge trigger; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse LVC/LCX/Z SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
| MC74HC76 MC74HC76D MC74HC76N ON1498 |
From old datasheet system
DUAL JK FLIP-FLOP WITH SER AND RESET
Dual JK Flip-Flop With Set and Reset
|
MOTOROLA[Motorola, Inc]
ON Semi
|
| MC10EL3506 MC100EL35DR2 MC100EL35DR2G MC10EL35DR2 |
5V ECL JK Flip-Flop
|
ONSEMI[ON Semiconductor]
|
| MC10EP3506 MC3100EP35DT MC3100EP35DTG MC100EP35 MC |
3.3V / 5V ECL JK Flip−Flop
|
ONSEMI[ON Semiconductor]
|
